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revisions ltr description date (yr-mo-da) approved a revise table i limits. revise figure 3 waveforms. make editorial changes. 87-03-16 n. a. hauck b updated boilerplate and added intersil as source of supply cage code 34371. - ltg 00-08-09 monica l. poelking c update boilerplate to mil-prf-38535 requirements. - ltg 01-06-05 thomas m. hess d update boilerplate to current mil-prf-38535 requirements. - cfs 07-07-06 thomas m. hess rev sheet rev d sheet 15 rev status rev d d d d d d d d d d d d d d of sheets sheet 1 2 3 4 5 6 7 8 9 10 11 12 13 14 pmic n/a prepared by greg a. pitz defense supply center columbus standard microcircuit drawing checked by d. a. dicenzo columbus, ohio 43218-3990 http://www.d scc.dla.mil this drawing is available for use by all departments approved by n. a. hauck microcircuit, digital, cmos, programmable interrupt controller, and agencies of the department of defense drawing approval date 86-06-18 monolithic silicon amsc n/a revision level size a cage code 67268 5962-85016 d sheet 1 of 15 dscc form 2233 apr 97 5962-e509-07
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 2 dscc form 2234 apr 97 1. scope 1.1 scope . this drawing describes device requirements for mil- std-883 compliant, non-jan class level b microcircuits in accordance with mil-prf-38535, appendix a. 1.2 part or identifying number (pin) . the complete pin is as shown in the following example: 5962-85016 01 y x drawing number device type (see 1.2.1) case outline (see 1.2.2) lead finish (see 1.2.3) 1.2.1 device type(s) . the device type(s) identify the circuit function as follows: device type generic number frequency circuit function 01 82c59a-5 5 mhz cmos programmable interrupt controller 02 82c59a 8 mhz cmos programmable interrupt controller 1.2.2 case outline(s) . the case outline(s) are as des ignated in mil-std-1835 and as follows: outline letter descriptive designator terminals package style y gdip1-t28 or cdip2-t28 28 dual-in-line 3 cqcc1-n28 28 square leadless chip carrier 1.2.3 lead finish . the lead finish is as spec ified in mil-prf-38535, appendix a. 1.3 absolute maximum ratings . supply voltage (referenced to gr ound) ...................................................................... +8.0 v dc 1 / input, output, or i/o voltage app lied .......................................................................... gnd -0 .5 v dc to v cc +0.5 v dc storage temperature range (t stg ) ............................................................................. -65 c to +150 c maximum power dissipation (p d ) ............................................................................... 1 w lead temperature (solderi ng, 10 seconds ) ................................................................ +275 c maximum junction temperature (t j ) .......................................................................... +150 c thermal resistance, junction-to-case ( jc ) ................................................................ see mil-std-1835 temperature under bias ............................................................................................ -55 c to +125 c 1.4 recommended operating conditions . supply voltage range (v cc ) ....................................................................................... +4.5 v dc to +5.5 v dc 1 / case operating temperature range (t c ) .................................................................... -55 c t c +125 c frequency of operation: device type 01 ....................................................................................................... 5 mhz device type 02 ....................................................................................................... 8 mhz data float after rd/inta (t rhdz ) reference number 14: 2 / device type 01 ....................................................................................................... 10 ns m inimum, 100 ns maximum device type 02 ....................................................................................................... 10 ns m inimum, 85 ns maximum __________ 1 / all voltages are referenced to v ss . 2 / the reference number refers to the parameter being meas ured on figure 3. the paramet er being measured uses test condition 2 on figure 4.
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 3 dscc form 2234 apr 97 2. applicable documents 2.1 government specif ication, standards, and handbooks . the following specificati on, standards, and handbooks form a part of this drawing to the extent specified herein. unless otherwise specified, the issues of thes e documents are those cited in t he solicitation or contract. department of defense specification mil-prf-38535 - integrated circuits, m anufacturing, general specification for. department of defense standards mil-std-883 - test met hod standard microcircuits. mil-std-1835 - interface standard electronic component case outlines. department of defense handbooks mil-hdbk-103 - list of st andard microcircuit drawings. mil-hdbk-780 - standard microcircuit drawings. (copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from the standardization document order desk, 700 robbins avenue, building 4d, philadelphia, pa 19111-5094.) 2.2 order of precedence . in the event of a conflict betw een the text of this drawing and the references cited herein, the text of this drawing takes precedence. nothing in this docum ent, however, supersedes applicable laws and regulations unless a specific exempti on has been obtained. 3. requirements 3.1 item requirements . the individual item requirements shall be in accordance with mil-prf-38535, appendix a for non- jan class level b devices and as specified herein. product built to this drawing t hat is produced by a q ualified manufacturer listing (qml) certified and qualif ied manufacturer or a manufacturer who has been granted transitional ce rtification to mil- prf-38535 may be processed as qml product in accordance wi th the manufacturers approv ed program plan and qualifying activity approval in accordance with mil-prf-38535. this qml flow as documented in the quality management (qm) plan may make modifications to the requirements herein. these modifi cations shall not affect form, fit, or function of the device. these modifications shall not affect the pi n as described herein. a "q" or "qml" ce rtification mark in accordance with mil- prf-38535 is required to identify w hen the qml flow option is used. 3.2 design, construction, and physical dimensions . the design, construction, and physica l dimensions shall be as specified in mil-prf-38535, appendix a and herein. 3.2.1 case outlines . the case outlines shall be in accordance with 1.2.2 herein. 3.2.2 terminal connections . the terminal connections shall be as specified on figure 1. 3.2.3 functional block diagram . the functional block diagram s hall be as specified on figure 2. 3.2.4 switching waveforms . the switching waveforms shall be as specified on figure 3. 3.2.5 ac test circuit and waveform . the ac test circuit and waveform shall be as specified on figure 4. 3.3 electrical performance characteristics . unless otherwise specified herein, the electrical performance characteristics are as specified in table i and shall apply over the full case operati ng temperature range. 3.4 electrical test requirements . the electrical test requirements shall be the subgroups specified in table ii. the electrical tests for each subgroup are described in table i.
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 4 dscc form 2234 apr 97 3.5 marking . marking shall be in accordance with mil-prf-38535, appendix a. the part shall be marked with the pin listed in 1.2 herein. in addition, the manufactu rer's pin may also be marked. for pack ages where marking of the entire smd pin number is not feasible due to space limit ations, the manufacturer has the option of not marki ng the "5962-" on the device. 3.5.1 certificat ion/compliance mark . a compliance indicator ?c? shall be marked on all non-jan devices built in compliance to mil-prf-38535, appendix a. the compliance indicator ?c? sha ll be replaced with a "q" or "q ml" certification mark in accordance with mil-prf-38535 to identif y when the qml flow option is used. 3.6 certificate of compliance . a certificate of compliance shall be required from a manufactu rer in order to be listed as an approved source of supply in mil-hdbk-103 (s ee 6.6 herein). the certificate of co mpliance submitted to dscc-va prior to listing as an approved source of supply sha ll affirm that the manufacturer's product meets the requirement s of mil-prf-38535, appendix a and the requirements herein. 3.7 certificate of conformance . a certificate of conformance as requi red in mil-prf-38535, appendix a shall be provided with each lot of microcircuits delivered to this drawing. 3.8 notification of change . notification of change to dscc-va shall be requi red for any change that affects this drawing. 3.9 verification and review . dscc, dscc's agent, and the acquiring activity re tain the option to review the manufacturer's facility and applicable required doc umentation. offshore documentat ion shall be made available ons hore at the option of the reviewer.
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 5 dscc form 2234 apr 97 table i. electrical performance characteristics . test symbol test conditions -55 c t c +125 c unless otherwise specified device type ref no. 1 / group a subgroups limits unit min max v oh1 i oh = -2.5 ma, v cc = 4.5 v all 1, 2, 3 3.0 v high level output voltage 2 / v oh2 i oh = -100 a, v cc = 4.5 v all 1, 2, 3 v cc -0.4 v low level output voltage 2 / v ol i ol = +2.5 ma, v cc = 4.5 v all 1, 2, 3 0.4 v high level input voltage v ih v cc = 5.5 v all 1, 2, 3 2.2 v low level input voltage v il v cc = 4.5 v all 1, 2, 3 0.8 v v in = 0.0 v all 1, 2, 3 -1.0 input leakage current i in v cc = 5.5 v v in = v cc all 1, 2, 3 1.0 a v in = 0.0 v all 1, 2, 3 -10 input/output leakage current i i/o v cc = 5.5 v v in = v cc all 1, 2, 3 10 a standby power supply current i ccsb v cc = 5.5 v v in = v cc or gnd 3 / outputs open all 1, 2, 3 10 a v in = 0.0 v, v cc = 5.5 v all 1, 2, 3 -500 a ir input load current i lir v in = v cc , v cc = 5.5 v all 1, 2, 3 10 a functional tests see 4.3.1d 4 / v cc = 4.5 v and 5.5 v all 7, 8 case y 4 15 pf input capacitance c in case 3 4 7 pf case y 4 15 pf output capacitance c out case 3 4 7 pf case y 4 15 pf i/o capacitance c i/o freq = 1 mhz t c = +25 c see 4.3.1c all measurements referenced to device ground case 3 4 7 pf see footnotes at end of table.
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 6 dscc form 2234 apr 97 table i. electrical performance characteristics - continued. test symbol test conditions -55 c t c +125 c unless otherwise specified device type ref no. 1 / group a subgroups limits unit min max a0/cs setup to rd/inta t ahrl 01, 02 1 9, 10, 11 10 ns a0/cs hold after rd/inta t rhax 01, 02 2 9, 10, 11 5 ns 01 3 9, 10, 11 235 ns rd/inta pulse width t rlrh 02 3 9, 10, 11 160 ns a0/cs setup to wr t ahwl 01, 02 4 9, 10, 11 0 ns a0/cs hold after wr t whax 01, 02 5 9, 10, 11 5 ns 01 6 9, 10, 11 165 ns wr pulse width t wlwh 02 6 9, 10, 11 95 ns 01 7 9, 10, 11 240 ns data setup to wr t dvwh 02 7 9, 10, 11 160 ns data hold after wr t whdx 01, 02 8 9, 10, 11 5 ns interrupt request width (lo) 5 / t jljh 01, 02 9 9, 10, 11 100 ns 01 10 9, 10, 11 55 ns cascade setup to second or third inta (slave only) t cvial 02 10 9, 10, 11 40 ns end of rd to next rd, end of inta to next inta within an inta sequence only t rhrl 01, 02 11 9, 10, 11 160 ns end of wr to next wr t whwl 01, 02 12 9, 10, 11 190 ns 01 21 9, 10, 11 500 ns end of command to next command (not same command type), end of inta sequence to next inta sequence 6 / t chcl 02 21 9, 10, 11 400 ns 01 13 9, 10, 11 160 ns data valid from rd/inta 7 / t rldv v cc = 4.5 v and 5.5 v 4 / 02 13 9, 10, 11 120 ns see footnotes at end of table.
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 7 dscc form 2234 apr 97 table i. electrical performance characteristics - continued. test symbol test conditions -55 c t c +125 c unless otherwise specified device type ref no. 1 / group a subgroups limits unit min max 01 15 9, 10, 11 350 ns interrupt output delay t jhih 02 15 9, 10, 11 300 ns 01 16 9, 10, 11 565 ns cascade valid from first inta (master only) t ialcv 02 16 9, 10, 11 360 ns 01 17 9, 10, 11 125 ns enable active from rd or inta t rlel 02 17 9, 10, 11 100 ns 01 18 9, 10, 11 60 ns enable inactive from rd or inta t rheh 02 18 9, 10, 11 50 ns 01 19 9, 10, 11 300 ns data valid from stable address t cvdv 02 19 9, 10, 11 200 ns 01 20 9, 10, 11 210 ns cascade valid to valid data t ahdv v cc = 4.5 v and 5.5 v 4 / 7 / 02 20 9, 10, 11 200 ns 1 / the reference number refers to t he parameter being m easured on figure 3. 2 interchanging of force and sense conditions are permitted. 3 / for ir0-ir7 pins, v in = v cc or open. 4 / tested as follows: f = 1 mhz, v ih = 2.6 v, v il = 0.4 v, v oh 1.5 v, v ol 1.5 v and c l 50 pf unless otherwise noted. circuits and waveforms are shown on figure 4. 5 / this is the low time required to clear the input latch in the edge triggered mode. 6 / worst case timing for reference number 21 (t chcl ) in an actual microprocessor system is typically much greater than the limits shown. 7 / the parameter being measured uses test condition 1 on figure 4.
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 8 dscc form 2234 apr 97 device types 01 and 02 case outlines y and 3 terminal number terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 cs wr rd d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 cas 0 cas 1 gnd cas 2 sp/en int ir0 ir1 ir2 ir3 ir4 ir5 ir6 ir7 inta a 0 v cc figure 1. terminal connections .
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 9 dscc form 2234 apr 97 figure 2. functional block diagram .
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 10 dscc form 2234 apr 97 read/interrupt acknowledge cycle write cycle figure 3. switching waveforms .
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 11 dscc form 2234 apr 97 interrupt acknowledge sequence notes: 1. interrupt request (ir) must remain high until leading edge of first inta. 2. during the first inta, the data bu s is not active in 80c86/80c88 mode. 3. 80c86/80c88 mode. 4. 8080/8085 mode. other timing figure 3. switching waveforms - continued.
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 12 dscc form 2234 apr 97 test condition v1 r1 r2 c1 min 1 2 1.7 v v cc 523 ? 1.8 k ? open 1.8 k ? 100 pf 30 pf test condition definition table note: ac testing: all input signals must switch between v il ? 0.4 v and v ih + 0.4 v. t r and t f are driven at 1.0 ns/v. figure 4. ac test circuit and waveform .
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 13 dscc form 2234 apr 97 4. verification 4.1 sampling and inspection . sampling and inspection procedures shall be in accordance with mil-prf-38535, appendix a. 4.2 screening . screening shall be in accordance with method 5004 of mil-std-883, and shall be conducted on all devices prior to quality conformance inspection. the following additional criteria shall apply: a. burn-in test, method 1015 of mil-std-883. (1) test condition a, b, c, or d. the test circuit sha ll be maintained by the manufacturer under document revision level control and shall be made available to t he preparing or acquiring activity upon reques t. the test circuit shall specify the inputs, outputs, bias es, and power dissipation, as applicable, in acco rdance with the intent specified in method 1015 of mil-std-883. (2) t a = +125 c, minimum. b. interim and final electrical test param eters shall be as specified in table ii herei n, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. table ii. electrical test requirements . mil-std-883 test requirements subgroups (in accordance with mil-std-883, method 5005, table i) interim electrical parameters (method 5004) --- final electrical test parameters (method 5004) 1 / 1, 2, 3, 7, 8, 9, 10, 11 group a test requirements (method 5005) 1, 2, 3, 7, 8, 9, 10, 11 groups c and d end-point electrical parameters (method 5005) 2, 8 (+125 c only), 10 1 / pda applies to subgroup 1. 4.3 quality conf ormance inspection . quality conformance inspection shall be in accordance with method 5005 of mil-std- 883 including groups a, b, c, and d inspections. the following additional criteria shall apply. 4.3.1 group a inspection . a. tests shall be as spec ified in table ii herein. b. subgroups 5 and 6 in table i, met hod 5005 of mil-std-883 shall be omitted. c. subgroup 4 (c in , c out , and c i/o measurements) shall be measured only for t he initial test and after process or design changes which may affect input capacitance. d. subgroups 7 and 8 shall include ve rification of the programming set.
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 14 dscc form 2234 apr 97 4.3.2 groups c and d inspections . a. end-point electrical parameters s hall be as specified in table ii herein. b. steady-state life test condi tions, method 1005 of mil-std-883. (1) test condition a, b, c, or d. the test circuit shall be maintained by the manuf acturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. the test circuit shall specify the inputs, output s, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of mil-std-883. (2) t a = +125 c, minimum. (3) test duration: 1,000 hour s, except as permitted by method 1005 of mil-std-883. 5. packaging 5.1 packaging requirements . the requirements for packaging shall be in accordance with mil-prf-38535, appendix a. 6. notes 6.1 intended use . microcircuits conforming to this drawing are int ended for use for government microcircuit applications (original equipment), design applic ations, and logistics purposes. 6.2 replaceability . microcircuits covered by this drawing will repl ace the same generic device covered by a contractor- prepared specificati on or drawing. 6.3 configuration control of smd's . all proposed changes to existing smd's will be coordinated with the users of record for the individual documents. this c oordination will be accomplished using dd form 1692, engineering change proposal. 6.4 record of users . military and industrial users shall inform defens e supply center columbus (dscc) when a system application requires configurati on control and the applicable smd. dscc will main tain a record of users and this list will be used for coordination and distribution of c hanges to the drawings. users of drawi ngs covering microelectronics devices (fsc 5962) should contact dscc- va, telephone (614) 692-0544. 6.5 comments . comments on this drawing should be directed to dscc-va, columbus, ohio 43218-3990, or telephone (614) 692-0547. 6.6 approved sources of supply . approved sources of supply are listed in mil-hdbk-103. the vendors listed in mil- hdbk-103 have agreed to this drawing and a ce rtificate of compliance (s ee 3.6 herein) has been subm itted to and accepted by dscc-va. 6.7 pin descriptions . for pin descriptions, see table iii herein.
standard microcircuit drawing size a 5962-85016 defense supply center columbus columbus, ohio 43218-3990 revision level d sheet 15 dscc form 2234 apr 97 table iii. pin descriptions . symbol description rd read: a low on this pin when cs is low enables the dev ice to release status onto the data bus for the cpu. wr write: a low on this pin when cs is low enables the device to accept command words from the cpu. cs chip select: a low on this pin enables rd and wr communication between t he cpu and the device. inta functions are independent of cs. inta interrupt ackowledge: this pin is used to enabl e device interrupt-vector dat a onto the data bus by a sequence of interrupt acknowl edge pulses issued by the cpu. sp/en slave program/enable buffer: this is a dual function pin. when in t he buffered mode it can be used as an output to control buffer transceivers (en). when not in the buffered m ode it is used as an input to designate a master (sp = 1) or slave (sp = 0). d 7 -d 0 bidirectional data bus: control status and inte rrupt-vector information is transferred via this bus. cas0- cas2 cascade lines: the cas lines from a private device bus to control a multiple device structure. these pins are outputs for a master dev ice and inputs for a slave device. int interrupt: this pin goes high whenever a valid interr upt request is asserted. it is used to interrupt the cpu, thus it is connected to the cpu?s interrupt pin. ir0-ir7 interrupt requests: asynchronous inputs. an interrupt request is executed by raising an ir input (low to high), and holding it high until it is acknowl edged (edge triggered mode), or just by a high level on an ir input (level triggered mode). a 0 address line: this pin acts in conjunction with the cs, wr, and rd pins. it is used by the device to decipher various command words the cpu writes and stat us the cpu wishes to read. it is typically connected to the cpu a 0 address line (a 1 for 80c86/88). gnd ground: ground. v cc power supply: +5 v supply pin. a 0.1 f capacitor between v cc and gnd is recommended for decoupling.
standard microcircuit drawing bulletin date: 07-07-06 approved sources of supply for smd 5962-85016 are listed below for immediate acquisition information only and shall be added to mil-hdbk-103 and qml-38535 during the next re vision. mil-hdbk-103 and qml-38535 will be revised to include the addition or deletion of s ources. the vendors listed below have agr eed to this drawing and a certificate of compliance has been submitted to and a ccepted by dscc-va. this information bulletin is superseded by the next dated revision of mil-hdbk-103 and qml- 38535. dscc maintains an online databas e of all current sources of supply at http://www.d scc.dla.mil/programs/smcr/ . standard microcircuit drawing pin 1 / vendor cage number vendor similar pin 2 / 5962-8501601ya 34371 md82c59a-5b 5962-85016013a 3 / mr82c59a-5b 5962-8501602ya 34371 md82c59a/b 5962-85016023a 34371 mr82c59a/b 1 / the lead finish shown for each pin representing a hermetic package is the most readily available from the manufacturer listed for that par t. if the desired lead finish is not listed contact t he vendor to determine its availability. 2 / caution . do not use this number for item acquisition. items acquired to this number may not satisfy the performance requirements of this drawing. 3 / not available from an approved source of supply. vendor cage vendor name number and address 34371 intersil corporation 1650 robert j. conlan blvd. palm bay, fl 32905 the information contained herein is di sseminated for convenience only and the government assumes no liability whats oever for any inaccuracies in the information bulletin.

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